The load on the host CPU is reduced as a lot of the preprocessing is handled by the frame grabber. Another interesting feature is the ability to capture data from four cameras with a single frame grabber. This helps to save costs on technical infrastructure, as fewer components are required.
Silicon Software microEnable 5
Enhanced frame grabber with high-speed interfaces
Silicon Software's microEnable 5 "ironman" is a family of high performance digital frame grabbers for CoaXPress, CameraLink and CameraLink HS cameras. They are based on the PCI Express bus technology for the PC and implemented with a PCIe x8 (Gen2) bus interface. The cost saving frame grabber family, microEnable 5 "marathon" is based on PCI Express x4 (Gen 2) bus interface.
The microEnable 5 CameraLink frame grabbers support onboard real-time high quality colour reconstruction for high-end and high-speed colour line scan and area scan applications. The CameraLink interface is capable of running with a bandwidth of up to 3.6 GByte/s with unique features and benefits for demanding applications - especially in high-end print applications and web and surface inspection with high quality colour reconstruction.
Reasons to choose the Silicon Software microEnable 5
Using the powerful Visual Applets software ensures fast and flexible programming of the FPGAs on the Silicon Software frame grabbers. This graphical design environment requires no special hardware programming know-how and frees up valuable development time for your application.
As a certified Visual Applets partner STEMMER IMAGING can create individual Visual Applets designs. This allows you to free up resources and focus on your core business.
Specifications
- Models: microEnable 5 ironman, microEnable 5 marathon
- Interface: CoaXPress, CameraLink and CameraLink HS
- Bandwidth: DMA1800 and DMA3600 technology (data transfer bandwidth of 1.8 GBytes/s and 3.6 GByte/s)
- Onboard memory: up to 2 GB for image buffering
- Latency: low latency
- Processing: processing of sensor data and preprocessing, pre-analysis of image data
- Product options: available as image acquisition and processing card (A series and V series)
- Power: built-in power supply for cameras
- PC interface: PCI Express x4 (marathon), PCI Express x8 (ironman)
- Operating system: Windows 7 and 10 with 32 and 64 bit
- Software: GenICam compatible, comprehensive SDK environment, supports Common Vision Blox (CVB)
- Miscellaneous: supports long cable lengths
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Model | PC interface | Inputs | Power over data interface | Number of cameras (max) | Interface/standard |
SISO MICROENABLE 5 - AD8-PoCL | PCIe x8 (Gen 2) | Full, Deca | yes | 1 | CameraLink |
SISO MICROENABLE 5 - AQ8-CXP6D | PCIe x8 (Gen 2) | CXP-1, CXP-2, CXP-3, CXP-5, CXP-6 | yes | 4 | CoaXPress |
SISO MICROENABLE 5 - VD8-PoCL | PCIe x8 (Gen 2) | Full, Deca | yes | 1 | CameraLink |
SISO MICROENABLE 5 - VQ8-CXP6D | PCIe x8 (Gen 2) | CXP-1, CXP-2, CXP-3, CXP-5, CXP-6 | yes | 4 | CoaXPress |
SISO MICROENABLE 5 MARATHON ACL | PCIe x4 (Gen 2) | Full, Deca, Base, Medium | yes | 2 | CameraLink |
SISO MICROENABLE 5 MARATHON ACX DP | PCIe x4 (Gen 2) | CXP-1, CXP-2, CXP-3, CXP-5, CXP-6 | yes | 2 | CoaXPress |
SISO MICROENABLE 5 MARATHON ACX QP | PCIe x4 (Gen 2) | CXP-1, CXP-2, CXP-3, CXP-5, CXP-6 | yes | 4 | CoaXPress |
SISO MICROENABLE 5 MARATHON ACX SP | PCIe x4 (Gen 2) | CXP-1, CXP-2, CXP-3, CXP-5, CXP-6 | yes | 1 | CoaXPress |
SISO MICROENABLE 5 MARATHON AF2 | PCIe x4 (Gen 2) | Dual CLHS F2 | no | 2 | CameraLink |
SISO MICROENABLE 5 MARATHON VCL | PCIe x4 (Gen 2) | Full, Deca, Base, Medium | yes | 2 | CameraLink |
SISO MICROENABLE 5 MARATHON VCLx | PCIe x4 (Gen 2) | Full, Deca, Base, Medium | yes | 2 | CameraLink |
SISO MICROENABLE 5 MARATHON VCX QP | PCIe x4 (Gen 2) | CXP-1, CXP-2, CXP-3, CXP-5, CXP-6 | yes | 4 | CoaXPress |
SISO MICROENABLE 5 MARATHON VF2 | PCIe x4 (Gen 2) | Dual CLHS F2 | no | 2 | CameraLink |
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TTL Triggerboard for microEnable 4 and 5 series
- Triggerboard for TTL
- 8 inputs
- 8 outputs
- connection with 2*D15 female ...
Optocoupled trigger extension board for microEnable 4 and 5 series
- Connection via 2 x SUB-D15 female sockets
- 8 inputs
- 8 ...
File | Topics | Size | ||
Silicon Software microEnable 5 Ironman AD8-PoCL | Data sheets |
2.0 MB |
||
Silicon Software microEnable 5 Ironman AQ8-CXP6D | Data sheets |
2.0 MB |
||
Silicon Software microEnable 5 Ironman VD8-PoCL | Data sheets |
2.0 MB |
||
Silicon Software microEnable 5 Ironman VQ8-CXP6D | Data sheets |
2.0 MB |
||
Silicon Software microEnable 5 Marathon ACL | Data sheets |
1.9 MB |
||
Silicon Software microEnable 5 Marathon ACX-QP | Data sheets |
1.9 MB |
||
Silicon Software microEnable 5 Marathon ACX-SP | Data sheets |
1.6 MB |
||
Silicon Software microEnable 5 Marathon AF2 | Data sheets |
1.9 MB |
||
Silicon Software microEnable 5 Marathon VCL | Data sheets |
1.9 MB |
||
Silicon Software microEnable 5 Marathon VCLx | Data sheets |
1.6 MB |
||
Silicon Software microEnable 5 Marathon VF2 | Data sheets |
1.9 MB |
||
Silicon Software microEnable 5 Marathon deep VCL | Data sheets |
2.1 MB |