STEMMER IMAGING

A FPGA (Field Programmable Gate Array) processor integrated into the device controls the image acquisition and pre-processing. The execution of image pre-processing steps such as image selector, sensor readout correction, invert, offset/gain/gamma correction and region-of-interest greatly reduces the CPU load of the host PC, which then has resources available for CPU-centric image analysis. A number of pre-programmed applet acquisition functions are available for area scan, line scan and frame grabber test.

Two CameraLink camera inputs are provided with Power over Camera Link (PoCL) for power delivery. The device supports all formats of the CameraLink standard, with full bandwidth (up to 80bit full configuration data rate) transfers. For synchronisation and communication between external devices and the camera, a trigger GPIO and an additional GPIO terminal block is provided for 4 opto-decoupled inputs and outputs.

The unit is 100% compliant with Silicon Software SDK and GUI control and service tools. An interface to imaging tools such as Common Vision Blox, Halcon and others is provided.

The compact, fan less, dust protected housing (IP40 pending) with low heat conduction allows easy system integration for a wide range of image processing tasks in factory automation and machine vision applications.