After an extended search for the optimal technical solution by a body of leading frame grabber producers, the HS-Link technology from Teledyne DALSA provided the first "proof of concept" which, in the guise of a product, was to demonstrate that the proposed concept really worked. It was decided to use components from the high-speed network technology to implement bandwidths of up to 300 MB/s with a single link, or "lane" in CameraLink HS jargon, and up to 6 GB/s with up to 20 lanes.
A complete CameraLink HS core can be integrated in the FPGA making the integration of the technology cost-effective with a ready-to-use IP core available to developers.
Particular attention was given to the triggering capability of the interface by adapting the link layer protocol and the adoption of special key codes. An extremely low trigger jitter of only 3.2 ns, can be sent from the frame grabber to the camera, making CameraLink HS excellent for line scan camera applications where high trigger frequencies can occur that must be transmitted with little jitter.
To ensure data integrity, CameraLink HS includes a checksum and resend mechanism that is implemented in hardware on the FPGA and does not need additional memory capacity in the camera. This delivers a cost-effective solution with lower resources needed inside the camera, enabling cameras to be made smaller due to the lower hardware resources.